To increase the performance of the dynamic random access memory (DRAM) system of a computer system, the technology of Fully Buffered Dual In-line Memory Module (FB-DIMM) has been developed.
FB-DIMM technology uses point-to-point connections between memory modules. For example, the host memory controller is connected to a first memory module; and a first memory module is connected to a second memory module; etc. Thus, the load of each link is constant. No branch is needed in this type of point-to-point connection. The memory modules operate at a substantially constant load environment regardless of the number of memory modules used in the system.
Advanced Memory Buffer (AMB) is a portion of a FB-DIMM which provides the point-to-point link in the memory system. An AMB typically includes two serial ports and a parallel port. One of the serial port is for connecting to the host memory controller or the AMB of the adjacent memory module that is closer to the host memory controller; the other serial port is for connecting to the AMB of the adjacent memory module that is further away from the host memory controller; and the parallel port is for connecting to the bus to the memory chips that are on the same memory module as the AMB.
For example, serial data from the host memory controller sent through a downstream serial link to the AMB is temporarily buffered in the AMB before being sent to the DRAM chips on the memory module. The serial data contains the address, data and command information, which is converted in the AMB and placed onto the DRAM bus on the memory module. The AMB writes in and reads out from DRAM chips as instructed by the memory controller. The data retrieved from the DRAM is converted to serial data in the AMB and sent to the memory controller through an upstream serial link.
High-speed transceivers play an important role in data communications, such as in the AMB. A typical data transceiver structure for the AMB includes a multiplexer (MUX) for time multiplexing data received from a parallel port into a serial form, a pre-driver and an output driver coupled to the multiplexer to drive the data in the serial form over a serial port. The typical data transceiver structure for the AMB further includes a clock recovery (CR) circuitry and a data recovery (DR) circuitry to recover clock and data signals from a serial port and a de-multiplexer (DEMUX) for converting the serial data into the parallel form for transmission over a parallel port.
Traditionally, a high performance transceiver is implemented using current mode logic (CML) circuits. A current mode logic circuit amplifies a differential input through switching a current between two paths. CML circuits are typically implemented using MOS transistors.
A conventional transceiver implemented using the CML technique uses a substantially constant power supply current, since the substantially same constant current is switched between the two paths regardless of the working frequency, data transition pattern, fabrication process and working temperature variations. While the use of constant power supply current reduces the power supply noise, a huge amount of power is wasted during the normal operation of the transceiver.